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“A Live Webinar on “Electronic IC Chip packaging for VLSI Engineers and Related scope in Industry.”
The Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore, Andhra Pradesh in association with IEEE student branch and IETE, organized a Live Webinar on “Electronic IC Chip packaging for VLSI Engineers and Related scope in Industry” for II and III ECE students and faculty on 03-07-2021,during 2:00 p.m -3.00 P.m. A total of 290 members were registered to the webinar and provided E-certificates to all the participants.
Prof.Dr.G.Subbarao, Principal, addressed the participants about the importance of Technology in the current Covid -19 crisis and indeed discussed about various future opportunities in the field of VLSI where the students could approach.
Mr. P.Raghavareddy, Convenor, HoD(ECE-Administration) and Dr.Sk.Mahabbob Basha, Co-Convenor, HoD(ECE-Academics) explained the Future Trends in CMOS VLSI Circuit, System Design and growing Job Opportunities in Semiconductor Industry.
Mrs.M.Suhasini, Assistant professor of ECE addressed the welcome note of the speaker.
Mr.Gonupalli Amarendra, webinar speaker, Senior Physical Design Engineer (Module Lead), Synapse Techno Design innovative Pvt Ltd, Bangalore white field was the resource person.
Contents Covered in Webinar:
- Electronic IC Chip packaging
- Physical Design Flow –An Overview
- Job Opportunities in Semiconductor (VLSI) Industry.
The main objective of the webinar was to provide an overview of the fundamental principles of VLSI, ASIC / FPGA design and impart experience designing integrated circuits. The session helped the participants to analyze the basic building blocks of large-scale digital integrated circuits and created global awareness and job opportunities in Indian semiconductor and electronic systems industry outside of the generic ‘IT’ umbrella.
